Get AI-powered advice on this job and more exclusive features. This range is provided by Acceler8 Talent. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more. Base pay range $220,000.00/yr - $250,000.00/yr Direct message the job poster from Acceler8 Talent Building North American Semiconductor and Photonic design teams Acceler8 Talent has partnered with a well-supported data center acceleration company that is actively searching for a driven Design Verification Engineer. This company is deeply committed to developing a novel interconnect architecture aimed at resolving congestion challenges within extensively distributed systems. Their recent successful completion of a significant Series B funding round serves as a strong indicator of their growth and potential. The company's founding members bring substantial expertise from distinguished hardware and technology enterprises. Notably, their primary investor boasts an admirable track record of nurturing early-stage startups into prosperous and thriving enterprises. They are currently seeking an engineer with a high level of expertise with SmartNIC and or Switch Verification , PCIe Serdes/PHY , or Ethernet Serdes/PHY . If you are located in the San Francisco Bay Area , Austin , TX, Raleigh, NC , or Boston, MA , area this company is offering a fully remote position. Requirements Proven industry experience with CXL and or PCIe Industry experience with Ethernet. Experience with FPGA design flow/verification is a strong advantage. Deep experience with full chip verification and infrastructure development. Strong current knowledge of UVM constructs, components, and practices. Expert knowledge of SystemVerilog, as well as Python or other scripting languages. Experience with C/C++ and general software engineering principles is highly desirable. Minimum BSEE/CE + 10 years or MSEE/CE + 5 years experience. Proven track record of design execution and quality on products which have shipped in high-volume. Seniority level Seniority level Mid-Senior level Employment type Employment type Full-time Job function Industries Semiconductor Manufacturing and Computer Hardware Manufacturing Referrals increase your chances of interviewing at Acceler8 Talent by 2x Get notified about new Design Verification Engineer jobs in San Francisco Bay Area . Design Verification Engineer (University Grad) Sunnyvale, CA $114,000.00-$133,000.00 1 week ago Santa Clara, CA $98,500.00-$184,000.00 9 hours ago Senior Principal Design Verification Engineer San Jose, CA $149,600.00-$214,100.00 1 week ago Physical Design and Verification Engineer Application Specific Integrated Circuit Design Engineer Senior ASIC Design Verification Engineer (Hardware) Sunnyvale, CA $114,000.00-$166,000.00 2 weeks ago Sunnyvale, CA $114,000.00-$166,000.00 2 weeks ago Design Verification Engineer (University Grad) Sunnyvale, CA $114,000.00-$133,000.00 7 hours ago ASIC Design Verification I (Full Time) United States San Jose, CA $92,500.00-$115,500.00 1 day ago Mountain View, CA $132,000.00-$189,000.00 2 weeks ago Cupertino, CA $104,000.00-$212,200.00 7 hours ago Fremont, CA $110,000.00-$300,000.00 3 weeks ago Analog/Mixed-Signal Verification Engineer San Jose, CA $110,000.00-$300,000.00 1 month ago San Jose, CA $149,600.00-$214,100.00 2 weeks ago SOC Verification and Methodology Engineer Santa Clara, CA $138,452.00-$190,000.00 1 day ago Sunnyvale, CA $114,000.00-$166,000.00 2 weeks ago Sunnyvale, CA $142,000.00-$203,000.00 2 weeks ago We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.

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