Principal Functional Safety Engineer - Semiconductor (Automotive: ISO 26262 ASIL D / ASPICE 3)

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Principal Functional Safety Engineer - Semiconductor (Automotive: ISO 26262 ASIL D / ASPICE 3) Join to apply for the Principal Functional Safety Engineer - Semiconductor (Automotive: ISO 26262 ASIL D / ASPICE 3) role at Ethernovia
About Ethernovia Ethernovia is transforming how cars are built by unifying in-vehicle networks into an end-to-end Ethernet system. Founded in 2018, we are enabling the autonomous driving, electric vehicle (EV), and software-defined revolutions through breakthrough compute, communication, and software virtualization. We bring together cameras/sensors, compute, and the external world to enable advanced driver assistance features and services.
Our co-founders are serial technology entrepreneurs, and we are backed by leading investors with ($64m) in Series A funding. Our backers include Porsche SE, Qualcomm, AMD, and Western Digital. Ethernovia has been recognized by EE Times among the Top 100 Startups for 2025. We offer pre-IPO stock options, competitive compensation, and a strong benefits package while growing your knowledge and career with world-class talent.
Summary We are looking for a well-rounded Senior Staff / Principal Functional Safety Engineer with 8+ years in the semiconductor industry to lead Automotive IC products toward ISO 26262 functional safety compliance at ASIL D. The ideal candidate has a proven track record of managing safety projects through certification and strong knowledge of ASPICE Level 3 process development. This role is a hands-on technical leader ensuring safety compliance across the full IC lifecycle, conducting audits and assessments, and serving as the primary point of contact for safety-related concerns with OEMs, Tier 1 customers, and partners.
This position is located in the United States - Remote.
Key Responsibilities
Lead end-to-end functional safety activities for Automotive ICs in compliance with ISO 26262 (ASIL D).
Define, implement, and maintain Safety Plans, Safety Concepts, FMEDA, Safety Manuals, and Safety Cases.
Define System Element out of context (SEooC), Assumption of Use (AoU) approaches and derive safety goals with ASIL decomposition strategies.
Drive technical safety architecture for digital, analog, and mixed-signal ICs, including design and verification of safety mechanisms (ECC, lockstep CPUs, watchdogs, voltage/clock monitors).
Perform and lead FMEA, FMEDA, and FTA analyses ensuring ASIL metrics (SPFM, LFM, PMHF) are satisfied.
Independently conduct Functional Safety Audits, Confirmation Measures, Assessments, and Reviews.
Collaborate with internal design, verification, and software teams to ensure freedom from interference and safe partitioning of ASIL vs. QM functions.
Partner with OEMs, Tier 1 customers, and external assessors to address safety issues, support audits, and resolve concerns.
Perform HW evaluation on non-compliance IPs (internal and external).
Support ASPICE Level 3 process development, ensuring alignment of FuSa with broader quality and process frameworks.
Mentor junior functional safety engineers and help shape best practices across the organization.
Qualifications
Bachelor's or Master's degree in Electrical/Electronic Engineering, Computer Engineering, or related discipline.
8+ years of experience in semiconductor development, specifically Automotive ICs.
Proven record of leading functional safety projects independently through ASIL D certification.
Strong knowledge of ISO 26262 (Parts 2–11) and related standards.
Past involvement in ASPICE Level 3 infrastructure and process development.
Hands-on experience with:
FMEA, FMEDA, FTA, DFA
Fault injection testing and safety metrics analysis
Safety mechanism design and verification
Familiarity with requirements management tools (DOORS, Jama, Polarion) and safety analysis tools.
Excellent communication skills to interface effectively with OEMs, Tier 1s, certification bodies, and cross-functional teams.
Preferred Skills
Background in digital/analog/mixed-signal SoC design.
HW/SW tool evaluation and classification.
Knowledge of ASPICE (up to Level 3) and Cyber Security (ISO/SAE 21434).
Experience with external audits and assessor engagement (e.g., TÜV, Exida, UL).
Understanding of Automotive standards and tools (IATF 16949, AEC-Q100, PPAP, APQP, and core automotive tools).
Personal Skills
Excellent communication and documentation skills.
Attention to detail.
Collaboration across multidisciplinary and international teams.
What You Can Expect from Ethernovia
Opportunities for deep and broad technology growth.
Career growth as the company grows.
Pre-IPO stock options.
Cutting-edge technology and a world-class team.
Competitive base salary and flexible hours.
Medical, dental, and vision insurance for employees.
Flexible vacation time and paid parental leave.
Salary Range The base salary varies by location, qualifications, experience, and internal equity. The annual salary range is $170,000 - $270,000 , with an incentive compensation component in the form of pre-IPO ISO options, in addition to base salary and benefits.
Additional Details
Seniority level: Mid-Senior level
Employment type: Full-time
Job function: Management and Manufacturing
Industries: Technology, Information and Internet
Note: This job description focuses on the responsibilities and qualifications for the Principal Functional Safety Engineer role and reflects the information available at the time of posting.
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Location:
San Jose, CA, United States
Salary:
$200,000 - $250,000
Job Type:
FullTime
Category:
Engineering