Sr. Principal Design Engineer page is loaded## Sr. Principal Design Engineerlocations: SAN JOSEtime type: Full timeposted on: Posted Todayjob requisition id: R51388## **At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.****Job Duties:*** Research, design, develop, and test electronic components and systems for Electronic Design Automation (EDA) and semiconductor intellectual property (IP) employing knowledge of electronic theory and materials properties.* Responsible for ASIC design digital verification for Design IP.* Work as part of a broad and geographically diverse team to architect and create testbenches, tests, monitors, checkers, and assertions for complex designs and subsystems.* Help define and scope IP verification requirements and assist with subsystem and system-level metric-driven verification.* Contribute to scheduling and track work to achieve high quality results and on-time completion.* Develop mixed-signal IP products and focus on complex protocols and custom mixed-signal functions.* Responsible for the development of the IP, including architecture, design and verification, testing chip lab validation feedback, and final customer deliveries.* May telecommute.* Must be available to work on projects at various, unanticipated sites throughout the United States.**Qualifications:*** Bachelor’s degree in Electronic Engineering, Electrical Engineering, or related field.* Minimum seven (7) years of progressive, post-baccalaureate experience in the job offered, or in an related occupation.* Universal Verification Methodology (UVM) with Specman e, and System Verilog* Verification Planning, execution and reuse experience* Formal Based Verification and Metric Driven Verification (MDV)* Gate Level Simulation and ATPG/JTAG simulation* Power aware verification, Design for Test (DFT) verification* Creating and maintaining verification specification documents* System Verilog Assertions (SVA) or PSL* Serialization-Deserialization (SerDes) Standards including PCIe, USB, SATA, and Ethernet* Must be available to work on projects at various, unanticipated sites throughout the United States.The annual salary range for California is $216,091 to $286,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the base salary range is a guideline, and individual total compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs includes: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.## **We’re doing work that matters. Help us solve what others can’t.**Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class. #J-18808-Ljbffr